MOS Technology 6507

UMC UM6507 (= MOS 6507).

The 6507 is an 8-bit microprocessor from MOS Technology, Inc.

It is essentially a 6502 chip in a smaller, cheaper 28-pin package. To do this, A15 to A13 and some other signals such as the interrupt lines are not accessible. As a result, it can only address 8 KB of memory, which for some applications at the time (1975) was acceptable and not overly restrictive.

The Atari 2600 contains a 6507 as one of its three main chips.

The 6507 and 6502 chips use the same underlying silicon layers, and differ only in the final metallisation layer. This ties the interrupt lines to their inactive level so that they are not vulnerable to generating spurious interrupts from noise. The first three digits of the chip identifier are part of the silicon layers, and the final digit is in the metallisation layer. Micro-photography of the 6502 and 6507 shows this difference.^[1]

The 6507 was only widely used in two applications, the best-selling Atari 2600 video game console and the Atari 8-bit family floppy disk controllers for the 810 and 1050 drives. In the 2600, the system was further limited by the design of the ROM cartridge slot, which allowed for only 4KB of external memory to be addressed (the other 4KB was reserved for the internal RAM and I/O chip).

Most other machines, notably home computers based on the 650x architecture, used either the standard 6502 or extended, rather than cut down, versions of it, in order to allow for more memory.

By the time the 6502 line was becoming widely used around 1980, ROM and RAM semiconductor memory prices had fallen to the point where the 6507 was no longer a worthwhile simplification; its use in new designs ceased at that point, though the Atari 2600 that contained it continued to be sold into the early 1990s, as it wasn't discontinued until January 1, 1992.

Pin configuration

The 6507 uses a 28-pin configuration, with 13 address pins and 8 data pins. The seven remaining pins are used for power, the CPU timing clock, to reset the CPU, to request bus wait states, and for read/write commands to memory (or MMIO devices) from the CPU. There is no IRQ or NMI pin on the processor.

References